ECE Seminar

Title: Asynchronous Stream Computing (ASC) for neuromorphic AI at the edge

Speaker

Dr. Mircea Stan,University of Virginia,Director of Computer Engineering Virginia Microelectronics Consortium (VMEC)

Abstract

The landscape of artificial intelligence has been dramatically transformed by scaling up the depth and number of parameters/weights in conventional AI models. The only major drawback of the conventional ANN approach is their energy inefficiency which is unsustainable in the long run. These conventional ANNs are inspired by biological neural networks and the brain, but only in a high-level abstract way implemented with digital circuits. In parallel with these conventional ANNs there has been an effort to create spiking neural networks (SNNs) which are trying to more faithfully mimic features of biological neural networks. While these neuromorphic approaches have shown promise, it is clear by now that the gap between conventional ANNs and neuromorphic ones is actually increasing, not decreasing as time goes by. But neuromorphic solutions don’t need to try to faithfully mimic all biological features, they only need to use some of the biologically-inspired aspects (such as the asynchronous time-domain data representation) while needing to adopt  the scaled-up depth and large number of parameters/weights of conventional ANNs. After all a plane does not flap its wings yet it arguably outperforms any biological bird.

Neuromorphic-compatible architectures can scale up significantly based on Asynchronous Stream Computing (ASC) principles. Central to the ASC paradigm is the encoding of information into asynchronous streams of “ones” and “zeros”. This captures the input signal characteristics, such as magnitude and rate of change, using the temporal domain for data representation. Unlike traditional digital systems, which often face limitations in parallelism and power consumption, ASC leverages the analog time domain to achieve significant energy efficiency. The architecture features Compute-in-Memory (CiM) tiles, which bypass the limitations of traditional RRAM-based CIM solutions by eliminating the need for DAC/ADCs. This not only enhances energy efficiency but also reduces area and cost, making ASC a viable scalable solution for complex AI models.

Bio

Mircea R. Stan is teaching and doing research in the areas of AI hardware, Processing in Memory, Cyber-Physical Systems, Computational RFID, spintronics, and nanoelectronics. Since 1996 he has been with the ECE Department at UVa, where he is now the Virginia Microelectronics Consortium (VMEC) endowed chair and Director of Computer Engineering. He received the received the 2024 A. Richard Newton Technical Impact Award in Electronic Design Automation (for 1995 paper "Bus-Invert Coding for Low Power I/O"), the 2018 Influential ISCA Paper Award (for 2003 paper “Temperature-aware microarchitecture”), the NSF CAREER award in 1997 and was a co-author on best paper awards at ISQED24, ASILOMAR19, LASCAS19, SELSE17, ISQED08, GLSVLSI06, ISCA03 and SHAMAN02 and IEEE Micro Top Picks in 2008 and 2003. He is Editor-in-Chief for the IEEE TVLSI and a fellow of the IEEE.